Integra Announces New Headquarters

Posted by Susan Campbell on Wed, May 15, 2019 @ 10:38 AM

WICHITA, KS - May 15, 2019-Integra Technologies LLC, a world leader in semiconductor packaging, assembly, test, characterization and related services, today announced it has moved it's corporate offices into a new facility in Wichita to accommodate rapid company growth. Expanding by 14,000 sq feet, the new location will house the company's administrative, sales, and support staff, making Integra's total footprint approximately 115,000 sq feet. 

The expansion is due to the increase in business the Qualification, Design Verification and Reliability Testing Services division has encountered over the last year. In 2018, Integra Wichita completed over600 complex military and aerospace part qualifications, having processing times of 12 – 26 weeks each.

Corporate Headquarters

Integra’s Wichita factory is on pace to perform over 700 complex military and aerospace part qualifications in 2019. With the increased demand, Integra made the decision to move the corporate staff out of the Wichita factory to allow for further expansion of production capabilities. Integra plans to further increase the production space in 2019 adding new equipment and engineering staff.

"The move will allow us to better serve our entire customer base of semiconductor manufacturers, military/space/aerospace, automotive OEMs, and medical device customers by increasing our capacity and reducing lead times," said Brett Robinson Integra’s President & CEO. "Integra is currently seeing rapid increase in production at all three factory locations. We are looking forward to continued growth throughout the rest of 2019 and beyond." 

The corporate office remit to address remains the same, 3450 N. Rock Rd., Bldg #100, Wichita, KS 67226. For more information contact Integra Technologies,

Heterogeneous Integration Roadmap Symposium 2/21-2/22

Posted by Susan Campbell on Mon, Feb 25, 2019 @ 11:47 AM

HIR-conf-2019-1There was a great turn out at this year's Heterogeneous Integration Roadmap Symposium in Milpitas, CA last week. We would like to thank all who attended!

HIR-conf-2019-2As a high-performance IC packaging provider, Integra Technologies can design, assemble and test custom System-in-Package (SiP) devices. By combining the functionality of a complete system into one packaged device, a SiP solution offers reductions in size, weight and power that are critical to next-generation performance in Aerospace, Industrial and Medical applications. In addition, a SiP solution reduces interconnect and trace lengths, minimizing the impact of parasitic and improving overall electrical performance.

Integra Technologies' capabilities in manufacturing multi-chip devices, surface mount assemblies, and flip chip and wire bond interconnects, enable the development of complete system-in-package solutions to improve performance and reduce footprint.



MEPTEC Symposium Today!

Posted by Susan Campbell on Wed, Dec 05, 2018 @ 01:13 PM

Stop by the Integra booth today and say hello to Rafi, Chip and Richard, 9:30 - 6:30 p.m.


Tags: meptec

MEPTEC Symposium, December 5

Posted by Susan Campbell on Tue, Dec 04, 2018 @ 08:00 AM

Visit Integra Technologies at MEPTEC's 'Heterogeneous Integration' Symposium, this Wednesday, December 5th from 8:00 - 5:00 with exhibits and reception to follow.


ISTFA Going on Now!

Posted by Susan Campbell on Wed, Oct 31, 2018 @ 10:43 AM

ISTFA is going on now at the Phoenix Convention Center. Stop by booth #731 and say Hello!



-55°C Electrical Testing from Integra

Posted by Susan Campbell on Wed, Sep 26, 2018 @ 09:32 AM

thermostream1Integra Technologies uses its advanced automated test equipment (ATE) for the purpose of testing at -55°C and beyond. In support of extended temperature testing, we have 35+ ATEs to support the test program development and testing of EEE components. Our successful track record for software development and electrical testing is largely due to:

  • Extensive experience in characterizing  and testing  EEE devices at -55°C and below. This includes Discrete, Passives, Linear, Memory, FPGA, SERDES, Microcontrollers, A/D, D/A, Connectors, Relays, Inductors and Magnetics.
  • Utilizing the largest on-site Test Engineering team, among all test labs worldwide, to develop software and hardware for the extended temperature testing and characterization
  • Integra’s -55°C test strategy includes using one of  our many precision ‘Thermal Temperature Forcing’ units in conjunction with our advanced ATEs. Our  temperature forcing units are testing from -75°C to +200°C.
  • Our custom DUT (Device Under Test)  temperature monitoring process includes
    • Continuous monitoring of temperature at the DUT level for compliance to maintain the target temperature. 
    • Temperature guard-band to account for temperature gradient across the measurement area
    • Calculated temperature ramp rates and soak times to achieve junction temperatureequilibrium using actual packaged devices
    • Precision temperature monitoring thermocouples used to insure highest integrity of test temperature assurance to specification
    • Controlled anti-ESD environment within the Thermal Temperature Forcing units
  • Our cold temperature process has been audited by DLA for compliance
  • High volume cold temperature testing using cold temperature handlers
  • We test both packaged and wafer level cold temperature testing
  • Thousands of lots of historical data running -55°C testing
  • Extensive work with cold temperature storage or cold temperature life test followed by cold temperature electrical testing

 Interested in Learning More? Contact Integra Today!


Your Single Source Turnkey Solution, from Wafer Processing to Final Test with our Locations Throughout the U.S.!

Open House TODAY!

Posted by Susan Campbell on Tue, Jun 19, 2018 @ 12:09 PM

Stop by and say 'hello' to the Integra group - facility tour, food and drinks! 3:00-7:00 p.m.!



OPEN HOUSE - June 19th!

Posted by Susan Campbell on Wed, Jun 06, 2018 @ 08:41 AM

Join us for an Open House at our Milpitas, CA facility Tuesday, June 19th! The Open House includes facility tours, wine tasting and hors d'oeuvres. View first hand Integra's ability to take your project from start to finish with their wafer processing and testing equipment all under one roof!

RSVP today!


Case Study: GaN Wafer Dicing

Posted by Jonny Corrao on Wed, May 30, 2018 @ 02:34 PM

To develop a singulation process for GaN wafers that consistently provides high quality and yields.

GaN-scribe-breakIntegra evaluated the quality of die singulation of mechanical dicing versus scribe and break. A 120µm thick 4" GaN wafer was used for the evaluation.


  • Mechanical dicing exhibited superior topside and backside quality compared to scribe and break.
  • The mechanical dicing cut was very clean on the topside of the die with none of the chipping issues that one might normally expect from a hard III-V material.
  • Backside quality from mechanical dicing was acceptable per Mil-Std specifications.
  • Scribe and break demonstrated inferior topside quality compared to mechanical dicing due to the inability to maintain consistent and sufficient force during scribing of the GaN material.
  • Backside quality was also substandard compared to mechanical dicing due to the excessive force required to break and separate the hard III-V material. 

As a result of this evaluation, Integra was able to develop and qualify a high-quality production process for singulating GaN wafers using mechanical dicing.

Interested in finding out more or have your own challenge for Integra to solve?

Let us know!

Request a quote

GSA Silicon Summit

Posted by Susan Campbell on Wed, Apr 18, 2018 @ 08:04 AM

gsa-summit-logoVisit Integra this Thursday at the GSA Silicon Summit! Stop by Booth 10 and tell Joe, Ron and Jeff hello!

Thursday, April 19th, 2018
8:00 a.m. to 5:00 p.m.
San Jose Convention Center
150 West San Carlos Street
San Jose, CA 95113