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Testing of Complex FPGAs, Memory and Microprocessors

Posted by Susan Campbell on Jun 11, 2020 11:06:27 AM

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webinarElectrical testing of semiconductors to datasheet is a very complex process. The testing process requires development of test algorithms and patters specific to device performance, application and functionality. The process requires advanced Automated Test Equipment (ATE), experienced product, test / hardware engineers and knowledge of the devices to be tested. Memory, FPGAs and Microcontrollers all have different test protocols and product specifications.

For example, some of the structures of a Microcontroller are comparable to a simple computer placed in a single chip with all of the necessary components like memory and timers embedded inside. Likewise; the structure of a FPGA typically has multiple structures with the silicon and requires in-depth knowledge of how such structures work. Patterns and configuration files need to be created to exercise such FPGAs.

Integra has developed over 10,000 test programs including these complex devices. This Webinar will explore the nuances of how such complex devices are tested.

Wednesday, June 24, 1:00 p.m. PST


Testing of Complex FPGAs, Memory and Microprocessors

  • Microprocessors
    • What does AC/DC and Functional Testing Mean for a Typical Microprocessor?
    • Device bus cycle timing implementation in ATE environment
    • Development of ATE based software to monitor device operation and pin status
    • Compiled device assembly language loaded to the device
  • FPGA Functional and Parametric Testing
    • Testing independent of manufacturer proprietary test methods
    • Tools of testing
    • How to develop  the test vectors and configuration vectors
    • How to perform
      • Functional at-speed testing
      • Functional evaluation to actual application design
      • Datasheet AC specs
      • DC testing
    • Characterization of device performance to application is possible
  • Memory Testing
    • DDR /DDR2 /DDR3 / DDR4 SDRAM, SSRAM QDR testing protocols
    • NAND Flash testing protocols
    • Data Retention and Testing

Presented by: Jonathan Hochstetler – VP of Engineering (Host) and Sultan Ali Lilani - Technical Director at Integra Technologies (co-Host)

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