July 2022 FAQ: SiP
As ICs become faster, smaller and more complex the need for innovative packaging solutions has increased. Integra has the experience to meet your most demanding advanced packaging challenges including SiP, MCM, RF Modules and Stacked assemblies.
Take a look at some of our most frequently asked questions:
Q: What is a SiP (System in a Package)?
A: The SiP performs all or most of the functions of an electronic system
- An example SiP can contain several chips—such as a specialized processor, DRAM, flash memory—combined with passive components—resistors and capacitors—all mounted on the same substrate.
- This means that a complete functional unit can be built in a multi-chip package, so that few external components need to be added to make it work
Q: What are some of the typical benefits of a SiP?
A: A properly implemented SiP can offer a range of benefits including::
- It can simplify the product system board
- Increases functionality per unit area/volume
- More performance in less space
- Improves Electrical Performance
- Reduced component count
Q: What are some of the Challenges for a SiP?
A: The more complex you make a system/package = the more challenges to overcome.
- Can I actually make the substrate work? (thickness, performance, widths and space/cost)
- Can I procure the parts needed in the formfactor that will work (can you get die?)
- The mix and match of components, shields, die, etc. can create stresses at the package or board level.
- Testability -Testability has to be designed in from the beginning
Q: What are some of the initial questions that need to be answered in creating a SiP?
A: The answers to the below will give you a target design and assist on trade-offs.
- What is the package envelope (space x, y & z)
- What is the goal of the SiP
- Is it to reduce cost, size, increase performance, eliminate a vendor, improve reliability?
- What is the application & outside parameters of all considerations?
- SiP by itself won’t save cost, but in combination with system partitioning, can significantly reduce the total BOM count at the product/board level.
Q: What are some of the Key Considerations in creating a SiP?
A: System Partitioning- Determines flexibility of the package and ability to optimize the package.
- 80% of the cost is defined in the first 20% of the design cycle.
- Firm Chip I/O locations limits flexibility, but faster schedule
- Flexible Chip I/O locations adds development time (IC’s in design)
- Die and Package Co-Design optimum for Cost Size and Performance, Build to print optimum for time.
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