IntegraBLOG

Open House TODAY!

Posted by Susan Campbell on Tue, Jun 19, 2018 @ 12:09 PM

Stop by and say 'hello' to the Integra group - facility tour, food and drinks! 3:00-7:00 p.m.!

open-house-1

 

Dice Before Grind (DBG) for Medical Devices

Posted by Jonny Corrao on Thu, May 12, 2016 @ 12:11 PM

CORWIL was recently approached by a medical customer who had developed a tiny wearable device that included a small bare die with innovative packaging. The product required a very small and strong die due to the customer’s very tight and unconventional package requirements. The die were on a 300mm wafer and had tight streets and low-k dialectrics.

Knowing that the backside and edge quality were key, the CORWIL team used Dice Before Grind (DBG) to reduce die breakage and chipping typically caused by the conventional method. DBG reverses the usual process of fully dicing the wafer after grinding. In DBG, the wafer is first trenched, or partial-cut, to a depth greater than the final target thickness. The wafer is then thinned to the final target resulting in die separation. After grind, the wafer goes to the in-line DBG Mounter, which mounts the wafer and gently peels off the protective grinding tape, completing the process.

Since the die are singulated at the final target thickness, wafer-level breakage is greatly reduced. Additionally, as a result of the die separation occurring during the grinding process, the backside chipping associated with thin-wafer dicing is kept to a minimum. DBG can also provide improved die strength depending on the application. For these reasons, DBG is an excellent process for processing wafers with high-quality backside requirements.

Top: DBG Bottom: No DBG
 
 
Corwil-medical-device-technology

CORWIL Technology Receives Quality Management System

Posted by Susan Campbell on Wed, May 06, 2015 @ 06:43 AM
corwil-iso-certification

Milpitas, CA, May 6, 2015 - CORWIL Technology announced today their Certification to the Aerospace Quality Management System, AS9100C, after a comprehensive audit by the international certification body NSF-ISR (NSF International Strategic Registrations). This major milestone demonstrates CORWIL’s commitment to the highest standards for contract management of assembly, test and reliability services.

"This achievement allows our customers to contract with CORWIL with the utmost assurance of device test accuracy, workmanship and reliability. We continue to fulfill our customers’ requirements by providing three quality management systems certifications: ISO 9001:2008 (management systems), ISO 13485 (medical devices), and AS9100C (aerospace systems) that meet government, regulatory, military, and space communities needs in particular,” said Dhiraj Bora, CORWIL’s Vice President of Sales and Marketing.

“CORWIL continues to offer its customers the benefits of combined engineering services, assembly, testing, reliability and operational processes. This certification is an outstanding achievement in our portfolio of offerings,” added Matt Bergeron, CORWIL President and CEO.

CORWIL achieved the AS9100C certification in conjunction with continual certification to ISO 9001:2008 and ISO 13485, with upgrades to include testing, burn-in, environmental testing, reliability, end-of-line and tape & reel services.

www.corwil.com

CORWIL Technology Selected as Supplier of the Year by Inphi Corporation

Posted by Susan Campbell on Wed, Feb 04, 2015 @ 07:30 AM

CORWIL-Inphi_Supplier_AwardMilpitas, CA, February 4, 2015– CORWIL Technology (CORWIL), the premier US based, IC assembly and test services subcontractor, offering full back-end assembly services starting from wafer sort, thinning & dicing through die-attach, wirebond, package sealing and final test, was awarded ‘Supplier of the Year’ by Inphi Corporation (NYSE: IPHI), a leading provider of high-speed, mixed-signal semiconductor solutions for the communications, data center and computing markets.

This prestigious award is given to suppliers in recognition for performance in terms of technology, quality, manufacturing execution, and support. “CORWIL has demonstrated leadership among our suppliers in 2014 through superior execution across these metrics,” said Dr. Ron Torten, Senior Vice President of Operations and IT at Inphi.

“We are honored to be recognized by Inphi as their supplier of the year. It is a tribute to our team who has spent considerable time and effort working with Inphi in support of their ‘fast data and fast growth’ products,” said Matt Bergeron, CORWIL Technology President and CEO. “We are committed to working collaboratively to meet our customers' needs and this shows that strong customer service can make a real difference.”

 

CORWIL_Inphi_Supplier_Award 
CORWIL Technologies’ Inphi team celebrates winning the award

 

 

About CORWIL Technology Corporation

CORWIL Technology provides high quality and responsive semiconductor assembly and test services focusing on Hi-Rel, fast-turn and wafer processing markets. Founded in 1990 and based in Milpitas, CA, CORWIL is the premier U.S. provider of full back-end assembly services and is a key partner with leading medical, Mil/Aero and commercial semiconductor companies.

For more information about CORWIL, please visit www.corwil.com.

 

About Inphi

Inphi Corporation is a leading provider of high-speed, mixed signal semiconductor solutions for the communications, data center and computing markets. Inphi’s end-to-end data transport platform delivers high signal integrity at leading-edge data speeds, addressing performance and bandwidth bottlenecks in networks, from fiber to memory. Inphi’s solutions minimize latency in computing environments and enable the rollout of next-generation communications infrastructure. Inphi’s solutions provide a vital interface between analog signals and digital information in high-performance systems, such as telecommunications transport systems, enterprise networking equipment, enterprise and data center servers, and storage platforms. To learn more about Inphi, visit www.inphi.com.

Inphi, the Inphi logo and Think fast are registered trademarks of Inphi Corporation. All other trademarks used herein are the property of their respective owners.

 

Die-Prep Considerations for IC Device Applications

Posted by Susan Campbell on Wed, Oct 29, 2014 @ 07:16 AM

MEPTECEarlier this month, CORWIL's own Jonny Corrao, Engineering Manager, presented 'Die-Prep Considerations for IC Device Applications,' at the October MEPTEC Luncheon at the Biltmore Hotel in Santa Clara, CA.

Thank you for coming for all of those who attended. If you weren't able to make the luncheon please download the presentation below.

Die-Prep Considerations for IC Device Applications (.pdf)

  • Final thickness, surface finish, edge & backside quality, application demands… one wafer, yet endless combinations of process options when working to achieve the highest quality dice possible, prior to IC assembly. This presentation explores various device applications, with consideration to technology node, wafer size, wafer material(s), interconnect, reliability criteria, packing method, and assembly requirements, in concert with die-prep disciplines spanning wafer thinning, singulation, die-sort (pick & place or “plating”), and inspection methods.

Please contact CORWIL with any question you have regarding the presentation or any of CORWIL's services - info@corwil.com


CORWIL Focuses on MedTech Industries

Posted by Susan Campbell on Mon, Aug 11, 2014 @ 02:42 PM

CORWIL Medical

CORWIL Technology is a U.S. based OSAT with a unique focus on Medical Device and Biotech industries. Our Bay Area facilities are state of the art, and boast an unparalleled range of high-end equipment and capabilities in both assembly and test disciplines, that when tagged with CORWIL’s highly skilled and experienced engineering team and ISO 13485:2003 certification, make CORWIL the ideal NPI and production partner for leading-edge Med-Tech applications such as DNA Sequencing, ICD/Pacemaker, Neuromodulation, Medical Imaging, and more. 

One of the biggest differentiators between CORWIL and other domestic subcontractors is our significant investment in back-end wafer processing – CORWIL has more wafer thinning, dicing, inspection, and die-sort capacity than any other OSAT in North America, and is positioned to support both high-mix/low-volume, as well as mid to high-volume die-prep requirements, from individual die, all the way through 300mm wafer sizes. CORWIL also has vast experience in exotic material processing such as AlN, GaN, GaAs, InP, SiC, and Sapphire. 

In our Class 1000 and 10000 cleanrooms, CORWIL's services include:

  • Wafer Thinning & Polishing
    • 300 mm wafer
  • Wafer Dicing
    • Largest array of dicing saws stateside
    • Multi-project wafers
  • Assembly
    • Wirebond
    • Flip Chip
  • Encapsulation
    • Flow cell attach
    • Custom dam & fill configurations
  • Plastic Molding
  • Environmental Test
  • Mechanical Test
  • Electrical Test

optical inspectionCORWIL’s wafer and die inspection capabilities comprise of advanced AOI systems (Automated Optical Inspection), as well as highly skilled technicians trained and experienced to MIL-STD-883, Class Levels Q & V, with DLA certification to MIL-PRF-38535. Our assembly portfolio spans a wide range of JEDEC and custom package types such as ceramic (hermetic and non-hermetic), plastic QFN/DFN, BGA, LGA, CSP, COB, and MCM, with numerous material options in die-attach, interconnect, and seal. CORWIL also offers a wide range of test services, including environmental, mechanical, and electrical, with an ATE portfolio spanning analog, digital, mixed-signal, and RF, complete with probers and handlers to support both wafer-sort and package-test. 

CORWIL is QML listed (levels Q&V), ISO 9001:2008, ISO 13485:2003, and is ITAR registered and compliant.

 

ISO Certification

What is Wafer Thinning?

Posted by Jonny Corrao on Mon, Sep 30, 2013 @ 09:05 PM

wafer-thinningWafer thinning is the process of removing material from the backside of a wafer to a desired final target thickness. The two most common methods of wafer thinning are conventional grind and chemical-mechanical planarization (CMP).

Conventional grinding is an aggressive mechanical process that utilizes a diamond and resin bonded grind wheel mounted on a high speed spindle to perform the material removal. The grind recipe dictates the spindle RPM, rate of material removal, and the final target thickness of the work piece. Harder materials like sapphire typically require slower feed rates compared to more forgiving materials like silicon.

The wafer is positioned on a porous ceramic rotating vacuum chuck with the backside of the wafer facing upwards (towards the grind wheel). Both the grind wheel and wafer chuck rotate during grind. Deionized water is jetted onto the work piece to provide cooling and wash away material particles generated during the grind. A grinding tape is applied to the front side of the wafer to protect the devices from being damaged during thinning.       

wafer-thinning-process

 

For conventional grinding the thinning is a two-step process. 

  1. The first step is a coarse grind that performs the bulk of the material removal. 
  2. The second step is a fine grind. The fine grind typically removes 30µm of material or less and provides the final finish on the backside of the wafer. Standard finishes for conventional grind include 1200 grit, 2000 grit, and poligrind.

1200 grit is a rough finish where the grind striations are clearly visible. 2000 grit has improved roughness compared to 1200 grit and the grind marks are less apparent. Poligrind is a near-mirror finish with the smoothest roughness. Poligrind also provides the highest wafer and die strength as the high grit wheel removes the most subsurface damage. As a rule, as the grit increases the wafer strength and smoothness improves while the wafer warpage and subsurface damage decreases.

Polish is another finish of conventional grinding. A polished finish is a mirror finish. This provides the least warpage and highest die strength of all finishes. Mechanical polishing requires a separate process and equipment from conventional grinding. Mechanical polishing is a minimal removal process of only 2-3µm of material and is typically only performed on silicon.  

In CMP, abrasive chemical slurry is used with a polishing pad to perform material removal. CMP provides greater planarization compared to mechanical grinding, however, it is considered a “dirtier” and more costly process. The wafers are mounted to a backing film, such as a wax mount, which can be difficult to remove or leave a residue on the front side of the wafer. 

CMP does have the advantage of being more forgiving when it comes to processing
hard or exotic materials like tungsten, but the cost-benefit and cleanliness of mechanical grinding compared to CMP should always be factored when determining the method of wafer thinning.