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Upcoming Webinars From Integra Technologies

Posted by Susan Campbell on Thu, Oct 01, 2020 @ 02:07 PM
Sign up now for one of Integra's Webinars coming up this month:
 
By request, Integra Technologies will be offering the
'Obsolescence Management for EEE Parts' Webinar AGAIN!
Thursday, October 22nd
11:00 a.m. PST
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Advanced Packaging Overview –
Design through Assembly and Test: FlipChip and SiP Packages
 
Thursday, October 22nd
1:00 p.m. PST 
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Have Questions?
 
Contact Integra Technologies

 


Miss one of our previous webinars? Download the notes today:

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Mil-Std-1580 DPA Including DPAs for Copper Bond Wire PEMs

Obsolescence Management for EEE Parts - Learn more about Integra's services to support Military/Space/Aerospace companies threatened with diminishing sources of supply for semiconductor and related EEE parts

Testing of Complex FPGA's, Memory and Microprocessors - Integra has developed over 10,000 test programs including these complex devices. This webinar will explore the nuances of how such complex devices are tested.

Standards of PEM Qual and Technical Requirements Review - Integra is the leader in performing PEM (Plastic Encapsulated Microcircuits) screening, qualification and DPA for the Aerospace and Defense market.


VISIT US:

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Huntsville • Redstone Arsenal Small Business Contracting Conference & Expo
Wed, Oct 21, 2020, 7:00am - 4:00pm
Von Braun Convention Center, Huntsville, AL 35801
 
 

Your Single Source Turnkey Solution, from Wafer Processing to Final Test with Locations Throughout the U.S.!

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Testing of Complex FPGAs, Memory and Microprocessors

Posted by Susan Campbell on Thu, Jun 11, 2020 @ 11:06 AM

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webinarElectrical testing of semiconductors to datasheet is a very complex process. The testing process requires development of test algorithms and patters specific to device performance, application and functionality. The process requires advanced Automated Test Equipment (ATE), experienced product, test / hardware engineers and knowledge of the devices to be tested. Memory, FPGAs and Microcontrollers all have different test protocols and product specifications.

For example, some of the structures of a Microcontroller are comparable to a simple computer placed in a single chip with all of the necessary components like memory and timers embedded inside. Likewise; the structure of a FPGA typically has multiple structures with the silicon and requires in-depth knowledge of how such structures work. Patterns and configuration files need to be created to exercise such FPGAs.

Integra has developed over 10,000 test programs including these complex devices. This Webinar will explore the nuances of how such complex devices are tested.

Wednesday, June 24, 1:00 p.m. PST


Testing of Complex FPGAs, Memory and Microprocessors

  • Microprocessors
    • What does AC/DC and Functional Testing Mean for a Typical Microprocessor?
    • Device bus cycle timing implementation in ATE environment
    • Development of ATE based software to monitor device operation and pin status
    • Compiled device assembly language loaded to the device
  • FPGA Functional and Parametric Testing
    • Testing independent of manufacturer proprietary test methods
    • Tools of testing
    • How to develop  the test vectors and configuration vectors
    • How to perform
      • Functional at-speed testing
      • Functional evaluation to actual application design
      • Datasheet AC specs
      • DC testing
    • Characterization of device performance to application is possible
  • Memory Testing
    • DDR /DDR2 /DDR3 / DDR4 SDRAM, SSRAM QDR testing protocols
    • NAND Flash testing protocols
    • Data Retention and Testing

Presented by: Jonathan Hochstetler – VP of Engineering (Host) and Sultan Ali Lilani - Technical Director at Integra Technologies (co-Host)

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